NXP mmWave Radar – Hang Cui

A collection of automotive millimeter-wave radar RF transceiver, microcontrollers, processors of NXP Semiconductors.

NXP Automotive Radar Systems

NXP Radar RF Transceiver:

TEF82xx 77 GHz RFCMOS Transceiver

Features:

Integrates up to 3 transmit and 4 receive channels

6-bit phase rotator

Operates in 76 GHz to 81 GHz band

Enhanced RF performance with power output of 13.5 dBm

Low Noise figure: 11.5 dB

Low phase noise: -95 dBc/Hz at 1 MHz

Cascaded imaging radar supported

CSI-2-DPHY and LVDS MCU interface for data transfer

Full-duplex SPI for control and monitoring

40 MHz crystal usage

Able to share clock with radar MCU

NXP RFCMOS Automotive Radar One-Chip SoC:

SAF85XX 77GHz RFCMOS Automotive Radar One-Chip SoC

Features:

Integrates up to 4 transmit and 4 receive channels

Operates in 76 GHz to 81 GHz band

Arm Cortex- A53 @320 MHz

Arm Cortex- M7 with @320 MHz

SPT 3.4 @320 MHz with integrated BBE32 Vector DSP

5.5 MB total memory with 4 MB SRAM

1 x SGMII Gbit Ethernet 10/100/1000 Mbit/s

2 x CAN-FD

NXP Radar Processor:

S32R294 Radar Microcontroller

Features:

Dual Power Architecture® e200z7 32-bit CPU up to 500 MHz

Dedicated safety processing with Power Architecture® e200z4 cores in lockstep up to 250 MHz

SPT 2.8 up to 430 MHz for optimized radar signal processing

Cross Timing Engine (CTE) for precise timing generation and triggering

Up to 2x MIPI CSI2 for advanced corner and front radar applications with NXP TEF82xx

Up to 5.5 MB SRAM with ECC

QuadSPI DDR up to 80 MHz

1 x Gb Ethernet 10/100 Mbit/s

3 x flexCAN with FD

1 x Dual-channel flexRay

S32R41 High-Performance Processor for High-Resolution Radar

Features:

Arm Cortex-A53 @800 MHz

2x Arm Cortex-M7 lockstep pairs @400 MHz (ASIL D capable)

SPT 3.5 @600 MHz with integrated DSP

2x MIPI CSI2 to connect to NXP TEF82xx

2x Ethernet interfaces: 1x RGMII (1000 Mbit/s), 1x RMII (100 Mbit/s)

2x FlexCAN with FD

1x SAR ADC with 8 channels

S32R45 High-Performance Processor for Imaging Radar

Features:

Quad Arm Cortex-A53 @800 MHz, flexible lockstep

Triple Arm Cortex-M7 lockstep pairs @400 MHz

SPT 3.1 @600 MHz with integrated DSP and multi- threading

Linear algebra accelerator (LAX) 1.0: > 100 GFLOPS

4x MIPI CSI2 to enable imaging radar with NXP TEF82xx

8 MB SRAM with ECC

DDR3L-1600 with 16/32-bit support and LP-DDR4-1600/3200 with 16/32-bit support

2* Gen 2/3 PCIe to enable system expansion and data sharing

2 x Gb Ethernet 10/100/1000 Mbit/s

8 x FlexCAN with FD