Capture Module (eCAP)
Example: eCAP1
void init_ECAP1(void)
{
EALLOW;
DevCfgRegs.SOFTPRES3.bit.ECAP1 = 1; // eCAP1 is reset
DevCfgRegs.SOFTPRES3.bit.ECAP1 = 0; // eCAP1 is released from reset
EDIS;
ECap1Regs.ECEINT.all = 0; // Disable all eCAP interrupts
ECap1Regs.ECCLR.all = 0xFFFF;
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 0; // Stop the counter
ECap1Regs.TSCTR = 0; // Clear the counter
ECap1Regs.CTRPHS = 0; // Clear the counter phase register
// ECAP control register 1
// CEVT1: rising edge -> CAP1
// CEVT2: falling edge -> CAP2
// CEVT3: rising edge -> CAP3 and interrupt
// bit 15-14 11: FREE/SOFT, 11 = ignore emulation suspend
// bit 13-9 00000: PRESCALE, 00000 = divide by 1
// bit 8 1: CAPLDEN, 1 = enable capture results load
// bit 7 0: CTRRST4, 0 = do not reset counter on CAP4 event
// bit 6 1: CAP4POL, 0 = rising edge, 1 = falling edge
// bit 5 0: CTRRST3, 0 = do not reset counter on CAP3 event
// bit 4 0: CAP3POL, 0 = rising edge, 1 = falling edge
// bit 3 0: CTRRST2, 0 = do not reset counter on CAP2 event
// bit 2 1: CAP2POL, 0 = rising edge, 1 = falling edge
// bit 1 0: CTRRST1, 0 = do not reset counter on CAP1 event
// bit 0 0: CAP1POL, 0 = rising edge, 1 = falling edge
ECap1Regs.ECCTL1.all = 0;
ECap1Regs.ECCTL1.bit.CAP1POL = 0;
ECap1Regs.ECCTL1.bit.CAP2POL = 1;
ECap1Regs.ECCTL1.bit.CAP3POL = 0;
ECap1Regs.ECCTL1.bit.CAP4POL = 1;
ECap1Regs.ECCTL1.bit.CTRRST1 = 0;
ECap1Regs.ECCTL1.bit.CTRRST2 = 0;
ECap1Regs.ECCTL1.bit.CTRRST3 = 0;
ECap1Regs.ECCTL1.bit.CTRRST4 = 0;
ECap1Regs.ECCTL1.bit.CAPLDEN = 1;
ECap1Regs.ECCTL1.bit.PRESCALE = 0;
ECap1Regs.ECCTL1.bit.FREE_SOFT = 3;
// ECAP control register 2
// bit 15-11 00000: reserved
// bit 10 0: APWMPOL, don't care
// bit 9 0: CAP/APWM, 0 = capture mode, 1 = APWM mode
// bit 8 0: SWSYNC, 0 = no action (no s/w synch)
// bit 7-6 10: SYNCO_SEL, 10 = disable sync out signal
// bit 5 0: SYNCI_EN, 0 = disable Sync-In
// bit 4 1: TSCTRSTOP, 1 = enable counter
// bit 3 0: RE-ARM, 0 = don't re-arm, 1 = re-arm
// bit 2-1 10: STOP_WRAP, 10 = wrap after 4 captures
// bit 0 0: CONT/ONESHT, 0 = continuous mode
ECap1Regs.ECCTL2.all = 0;
ECap1Regs.ECCTL2.bit.CAP_APWM = 0; // capture mode
ECap1Regs.ECCTL2.bit.CONT_ONESHT = 0; // continuous
ECap1Regs.ECCTL2.bit.STOP_WRAP = 2; // wrap after CEVT3 is enough
ECap1Regs.ECCTL2.bit.SYNCO_SEL = 2; // disable sync out
ECap1Regs.ECCTL2.bit.SYNCI_EN = 0;
ECap1Regs.ECCLR.all = 0xFFFF;
// Enable desired eCAP interrupts
// ECap1Regs.ECEINT.all = 0x0008;
// bit 15-8 0's: reserved
// bit 7 0: CTR=CMP, 0 = compare interrupt disabled
// bit 6 0: CTR=PRD, 0 = period interrupt disabled
// bit 5 0: CTROVF, 0 = overflow interrupt disabled
// bit 4 0: CEVT4, 0 = event 4 interrupt disabled
// bit 3 1: CEVT3, 1 = event 3 interrupt enabled
// bit 2 0: CEVT2, 0 = event 2 interrupt disabled
// bit 1 0: CEVT1, 0 = event 1 interrupt disabled
// bit 0 0: reserved
ECap1Regs.ECEINT.bit.CEVT3 = 1;
ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1; // Start timestamp counter
PieCtrlRegs.PIEIER4.bit.INTx1 = 1; // Enable ECAP1_INT in PIE group 4
IER |= M_INT4; // Enable INT4 in IER to enable PIE group 4
}
float duty_cycle = 0;
Uint32 PwmDuty; // measured PWM duty cycle ticks
Uint32 PwmPeriod; // measured PWM period ticks
__interrupt void eCAP1_isr(void) {
Uint32 cap1 = ECap1Regs.CAP1;
Uint32 cap2 = ECap1Regs.CAP2;
Uint32 cap3 = ECap1Regs.CAP3;
PwmDuty = cap2 - cap1;
PwmPeriod = cap3 - cap1;
if(PwmPeriod != 0) {
duty_cycle = (float)PwmDuty / (float)PwmPeriod;
}
ECap1Regs.ECCLR.bit.CEVT3 = 1; // Clear the CEVT3 flag
ECap1Regs.ECCLR.bit.INT = 1; // Clear the ECAP1 interrupt flag
PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
}
void main(void)
{
// ...
EALLOW;
PieVectTable.ECAP1_INT = &eCAP1_isr;
EDIS;
init_ECAP1();
InitECap1Gpio(24);
GPIO_SetupPinOptions(24, GPIO_INPUT, GPIO_ASYNC);
// ...
}
Reference
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